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A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science Mikhail Kovalev 2014 edition
A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof - Lecture Notes in Computer Science
Mikhail Kovalev
It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.
352 pages, 147 black & white illustrations, biography
| Media | Books Paperback Book (Book with soft cover and glued back) |
| Released | December 1, 2014 |
| ISBN13 | 9783319139050 |
| Publishers | Springer International Publishing AG |
| Pages | 352 |
| Dimensions | 155 × 235 × 19 mm · 508 g |
| Language | English |
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